Advisor
Dr. Horng-Yuan Shih (施鴻源)
學歷:
國立交通大學電子所博士 (Ph. D. of Institute of Electronics Engineering, National Chiao-Tung University)
國立交通大學電信所碩士 (M. S. of Institute of Communication Engineering, National Chiao-Tung University)
淡江大學 電機工程系 學士 (B. S. of Dept. of Electrical Engineering, Tamkang University)
經歷:
工業技術研究院 資訊與通訊研究所 技術經理
工業技術研究院 系統晶片技術中心 技術經理
工業技術研究院 系統晶片技術中心 技術副理
工業技術研究院 系統晶片技術中心 射頻積體電路設計部 課長
工業技術研究院 系統晶片技術中心 射頻積體電路設計部 工程師
Profile:
Horng-Yuan Shih was born in Taipei, Taiwan, in 1976. He received the
B.S. degree in electrical engineering from Tamkang University, Tamsui,
Taiwan in 1997, and the M.S. and Ph.D degree in communication
engineering and electronics engineering from National Chiao-Tung
University (NCTU), Hsinchu, Taiwan, in 2000 and 2010, respectively.
In 2001, He joined System-on-Chip (SoC) Technology Center
(STC), Industrial Technology Research Institute (ITRI), Hsinchu,
Taiwan. From 2001 to 2002, he was a RF design engineer. He designed
power amplifiers for GSM system in a GaAs HBT process, a low phase
noise 1.8 GHz LC-VCO for fulfilling strict requirement of GSM/DCS
system in a 0.18 µm CMOS process and an RF transmitter for W-CDMA
system in a 0.35 µm SiGe BiCMOS process. From 2003 to 2006, he
was as a section manager and was responsible for developing a RF
transceiver for W-CDMA system. He also designed a fractional-N
synthesizer for a multi-mode RF transceiver (GSM/DCS and WLAN) in a
0.13 µm process. From 2007 to 2008, he was responsible for
designing a wideband RF transceiver for UWB applications. Since 2010,
He is an assistant professor in department of electrical engineering,
Tamkang University. His research interests include RF and analog
circuit design for wireless/wireline transceivers and frequency
synthesizers.
Ph.D. Student
2012
Yu-Chuan Chang (張育銓)
Research Topic: Current-Mode Circuits with Digital-Assisted Calibration.
M.S. Student
2011
Chun-Fan Chen (陳俊帆)
Research Topic: Ultra Low-Power Multi-rate Low-IF/Zero-IF Reconfigurable FSK Receiver.
Sheng-Kai Lin (林盛凱)
Research Topic: Time-to-Digital Converter with Resolution of Sub-Pico Second.
2012
王俊鴻
Research Topic: Ultra Low-Power Zero-IF Receiver Front-end with Filcker Noise/DC-offset Reduction Technique.
廖柏舜
Research Topic: Time-to-Digital Converter with Resolution of Sub-Pico Second.
胡毓維 (4+1 Program)
Research Topic: Ultra Low-Power Multi-rate FSK Transmitter.
Alumni
2012
Yu-Chuan Chang (張育銓) Master Degree, Design of Ultra-low Power Receiver Front-end in a Sub-micro CMOS
News :
2012/3/24
All M.S. student positions are full.
2011/7/3
All M.S. student positions are full.
Only one M.S. student position is avaliable.