Projects:
National Science Council
可變架構與傳輸速率之超低功耗頻率鍵移接收解調電路研製(I) (Design of an ultra-low power, Low-IF/Zero-IF Reconfigurable and variable data rate FSK Receiver) 2012.08.01~2013.07.31
次微微秒解析度之時間數位轉換器電路研製 (Design of a time-to-digital converter with resolution of Sub-Pico second) 2011.08.01~2012.07.31
應用於超寬頻系統之寬頻電流式類比基頻電路 (Wideband current-mode analog baseband circuits for Ultra-wideband) 2010.10.01~2011.7.31
Research:
Sub-Threshold RF/Analog Circuits
Current-Mode Instrument Amplifier with Filcker Noise/DC-offset Reduction Technique. (張育銓)
Ultra Low-Power Multi-rate Low-IF/Zero-IF Reconfigurable FSK Receiver. (陳俊帆)
Coarse-Fine Time-to-Digital Converter. (林盛凱)
Ultra Low-Power Zero-IF Receiver Front-end with Filcker Noise/DC-offset Reduction Technique. (王俊鴻)
Coarse-FineTime-to-Digital Converter. (廖柏舜)
Ultra Low-Power Multi-rate FSK Transmitter. (胡毓維)
News :
2012/7/20
A project "Design of an ultra-low power, Low-IF/Zero-IF
Reconfigurable and variable data rate FSK Receiver" is sponsored by
National Science Council.
2011/7/22
A project "Design of a time-to-digital converter with resolution of Sub-Pico second" is sponsored by National Science Council.
Links :
Design by Minimalistic Design